At the request of local industry, the fourth annual Central Pennsylvania Symposium on Signal Integrity has been expanded to two days this year.
Traditionally a one-day event, consistent requests for additional sessions prompted the expansion, says Penn State Harrisburg Professor of Engineering Aldo Morales, co-director of the host Center for Signal Integrity.
“The two-day format will better enable us to more fully focus on current and cutting-edge research developments in the vast regional connector industry,” he says.
The April 12 and 13 event at the Best Western Airport Inn and Suites on Eisenhower Boulevard will include presentations by experts in the field of signal integrity and breakout sessions for hardware and software applications.
The Center for Signal Integrity is the only academic unit in the region dedicated to partnering with the area’s connector companies in product development through faculty and student research and collaboration. The center also provides employee training and serves as a clearinghouse for the latest findings in the field. The center is partially funded by Ben Franklin Technology Partners, Tyco, Amphenol, FCI, Samtec, Yaziki North America, Phoenix Contact, and Agilent.
Known at the “connector capital of the world,” the Harrisburg metropolitan area is home to more than 20 electrical connector firms. It is estimated that the region holds 80 to 90 percent of the U.S. connector market and as much as half of the market worldwide.
In the world of high-speed digital design, signal integrity is a critical issue that poses challenges to design engineers. It involves two concerns – signal timing and quality – in electrical design.
Symposium topics and speakers include:
“Challenges Ahead in Memory Development” – Becky Loop, senior staff analog engineer and signal integrity technical lead.
“3D EM TDR SI Analysis” –Fabrizio Zanella, systems manager, CST of America, a provider of full-wave electromagnetic software.
“Signal Integrity Characterization and Measurements” – Jit Lim, the senior technologist for high-speed signal analysis,Tektronix.
“Looking Back to Look Ahead: Doing Increasing Speeds Right” – John D’Ambrosia, senior scientist, CTO Office of Force 10 Networks.
“PCB Modeling Requirements for Personal Computer Systems” – Howard Heck, currently leading development of the specifications and interconnect solutions for Intel’s SuperSpeed USB technology.
“Superior Signal Integrity Insight with Agilent E5071C ENA Option TDR” – Yoji Sekine, product manager and marketing engineer, Agilent Technologies’ Component Test Division.
“XAUI Backplane Interconnect Using PLTS” – Mike Resso, signal integrity application scientist, Agilent Technologies’ Component Test Division.
“Case Histories of Recent SI and EMC Interconnect Problems” – Lee Hill, founding partner, SILENT, an independent electromagnetic compatibility and design firm.